Programmable controllers (PLCs) are widely used in various fields of industry. They need to have the characteristics of high reliability and real-time. In order to improve the real-time performance and reliability of PLC data processing, this paper designs a special processor architecture suitable for the characteristics of PLC. At present, the requirement of real-time and stability in the field of work control is getting higher and higher.
Most of the programmable logic controller (PLC) microprocessors independently developed in China adopt the architecture of general purpose processor or the combination of general purpose processor and Boolean processor, which is difficult to meet the requirement [1,2]. General purpose processors are mainly for byte and word processing, while programmable controller instructions are mainly bit operation [1,2].
This urgently requires the introduction of special processors suitable for the characteristics of programmable controllers. In order to improve the real-time performance and data processing performance of the programmable controller, a real-time and reliable special programmable controller processor is proposed in this paper. The processor has a special instruction set which conforms to the characteristics of the programmable controller, and uses a bit processor to achieve hardware acceleration. Multiprocessors are used to execute the same program in parallel, or when the main processor fails, the execution of other processors ensures the reliability of the programmable controller. It integrates PLC numerical calculator and PID calculator. It is mainly used in the field of function calculation, analog control and process control in the field of PLC numerical processing, such as temperature, pressure, flow rate and liquid level control. The processor architecture of the programmable controller adopts 32-bit RISC architecture, including a high-speed bus and a low-speed bus [4]. The main devices extended on high-speed bus include ARM9 processor, PLC special processor and ABB arbitrator used to arbitrate access priority of master-slave devices; the slave devices extended on high-speed bus include 256KB FLASH, 256KB SRAM, 256KB I/O SRAM used to store data of input and output devices, and the arbitrator used to arbitrate access priority of master-slave devices. Ethernet MAC 10/100 for network communication; AD, DA converter, 256 counters, 256 timers, general input and output ports and interrupt controller for peripheral interrupt service are extended on low-speed bus. The real-time processor architecture of the programmable controller is shown in Figure 1. According to its functions, the architecture of the special processor for PLC can be divided into general processor and special instruction set processor for PLC. The special instruction set processor of PLC adopts instruction set which accords with the characteristics of PLC instructions.
It mainly includes bit processor, PLC numerical calculator and PID calculator. PID arithmetic is mainly used in the field of analog control and process control of programmable controller. The real-time design of the programmable controller processor mainly includes instruction set, bit processor and parallel operation design of PID arithmetic. Through the analysis of the language of the PLC instruction list, the frequency of the use of the PLC instruction is obtained, as shown in Table 1. Through the analysis of switching PLC program, such as answering device, motor forward and backward control, fountain control, traffic light control, mountain cable car control and other control programs, Boolean instructions, functional block instructions, access instructions and control instructions frequency analysis [3], it is concluded that Boolean instructions and access instructions account for a larger proportion.
As shown in Table 2. From Table 1 and Table 2, it is concluded that in order to improve the speed of execution of switching program by the special PLC processor, it is necessary to speed up the execution of Boolean instructions and improve the speed of accessing and accessing PLC data. According to the analysis of PLC instructions, a real-time special processor for PLC is designed. The main modules include bit processor design and analog PID arithmetic design. Bit logic operation instructions and jumpable bit logic operation instructions are used to execute in bit processor. When the instruction ANDCRIBIT is executed, the bit processor determines whether the value in the accumulator is 0 or not, and if it is 0, it jumps to the instruction CR. The instructions between ANDCRBIT instructions and CR instructions are not executed, thus saving the execution time of PLC instructions. When ORCRBIT is executed, the bit processor determines whether the value in the accumulator is 1, and if it is 1, it jumps to PUSHOR. The instructions between ORCRBIT instructions and PUSHOR instructions are not executed. The above is to accelerate the real-time design of switching program in PLC. The reliability design of the PLC processor can adopt the way of parallel execution of the program by multi-processor, or increase the parallelism of the processing by adding multi-bit processors, PLC numeric arithmetic and PID arithmetic. These two ways can not only improve the running speed, thermostatic element but also ensure the correctness of program execution. Using multiple processors, parallel execution of the same or different PLC programs.
If a simple PLC program is executed in parallel with multiple processors, not only can the results of the multi-processors be more consistent, but also the accuracy of the output can be guaranteed. If a complex PLC program is executed, in the case of redundancy of four processors, the program can be allocated to two processors to execute, which can not only increase the execution speed, but also compare the output results and judge the accuracy of the output. If a processor fails, other processors are executing the same program, and the PLC program can be guaranteed to continue executing. Increase the number of operation units to improve the processing parallelism. In the special processor of PLC, more than one operation unit is added. When the same type of instructions are sent to different operation units of the same function, the throughput of executing instructions can be increased. As shown in Figure 3, if the instructions are taken out, they are sent out in disorder and two trigonometric function operation instructions are sent to PLC numeric calculator A and PLC numeric calculator B respectively, that is to say, the throughput of executing instructions can be increased. Quantity; Similar PID calculator A and PID de-calculator B can perform different PID operations respectively. From the point of view of real-time and reliability, this paper designs a processor which accords with the characteristics of programmable controller. The processor of the programmable controller can be used in the field of switching control, analog control and process control.
In the aspect of real-time, a special instruction set which accords with the characteristics of the PLC instructions is designed, and the special instruction set of the PLC is accelerated by a bit processor, which improves the execution speed of the switching control program of the PLC. By analyzing the formula of PID operation, the pipeline design is added, the PID operation is accelerated, and the speed of PLC simulation and process control program execution is improved. In terms of reliability, the parallel execution of multiprocessors ensures the normal execution of PLC in case of failure. Parallel execution of instructions with the same function can also speed up the execution of PLC instructions by adding the operation unit of the same function calculator.